Field of the Invention
The present invention relates to an assembly that includes electrical circuitry and projecting or protruding nodules and a method of forming the same.
Description of Related Art
System in package (SiP) is a combination of multiple electronic components of different functionality, assembled together to provide multiple functions associated with the system or sub-system. A SiP component may be an active integrated circuit dye, passive components, MEMS devices, optical components as well as other packaging and devices.
Quilt packaging (QP) is a SiP chip-to-chip interconnect technology which utilizes “nodules” that extend from, project, or protrude out from vertical facets along edges of substrates, such as integrated circuit chips or PCBs, to allow for inter-substrate communication and mechanical fastening and alignment. QP technology enables the interconnection of multiple substrates fabricated with dissimilar technologies or substrate materials to be integrated into a monolithic-like structure.
Due to the nature of the QP manufacturing process, the geometry of the nodules and chips/component substrate are lithographically-defined, which allows for the application/specific definition of the substrate-to-substrate gap and alignment, in addition to overall package-level system architecture. QP is a complementary packaging approach to existing SiP technologies, such as 3-D chip stacking and flip chip. Details regarding quilt packaging and the formation of nodules can be found in U.S. Pat. No. 7,612,443 to Bernstein et al. which is incorporated herein by reference in its entirety.
Disclosed herein is a method of rapid prototyping and manufacture of QP interposers (or nodules) for existing active and passive chips, components, or substrates. Also disclosed is the application of QP technology on non-semiconducting materials, as well as the application of QP technology to reduce or eliminate small signal or switching noise between chips or components.